U11-CB2 is used to signal data coming on the shared solenoid/sound bus. Low edge (signal going from high to low) signals the solenoid board to grab the data. High edge signals the sound board. For the sound board, this is called the SI (Sound Interrupt) line. I believe I got the high/low right. I did all my tests with a logic analyzer connected after the inverter on the sound board. So I am inverting all my notes here.
Once the Sound board sees the transition from low to high (high edge). It immediately grabs the first 4-bits from U11-PA7 through U11-PA4. The data is on the lines for about 130 microseconds. Then the next 4-bits come in. I usually grab the second 4-bits about 300 microseconds after the Sound Interrupt. If I wait 400 microseconds, the data is gone.
Technically, it doesn't matter which bit is MSB or which is the high nibble or the low nibble for the sound address. The sound board calls U11-PB0 as S0 (sound bit 0), U11-PB1 as S1 (sound bit 1), U11-PB2 as S2, and U11-PB3 as S3. The sound board has a S4 (fifth sound bit) but neither my Elektra nor MrMrsPac-Man have that wire in the harness. My guess is that they wanted to use all 6 input inverters in the chip for the Sound Interrupt (SI) and 5 sound bits (S0-4). I read the low nibble first, and the high nibble second.
What's strange is that you would think that there would be a lot of transitions on the solenoid/sound interrupt signal that the sound board would ignore, because there could be a solenoid command with no sound. But there isn't. I think this because all solenoid commands are followed with a valid sound command. But there has to be the opposite - sound commands with no solenoid action. The solenoid board probably has a way to ignore a command - maybe there is a NULL solenoid address. It would be easy for the sound board to do this as there are 256 sound addresses. Just pick one that has no sound. But... it doesn't. All sound interrupts are followed with a valid sound (from the two machines I have tested).