(Topic ID: 278609)

Whitestar/SAM MPU to Power I/O Board

By ThatOneDude

3 years ago



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    #1 3 years ago

    Is there a pinout or description of the function of the J1 input to the Power I/O boards on Stern Whitestar/SAM systems? I'm looking at controlling such a board, and I can't find much documentation specific to how the MPU drives the lamps and solenoids. I'm assuming that it exists, since the P-ROC presumably uses that to drive these boards as well.

    #2 3 years ago

    Bump

    #3 3 years ago

    After some more digging, I used the P-ROC connector listing to start piecing this together. It appears to have an 8 bit data bus with 7 enable signals. For some reason, the P-ROC doesn't show a #6 enable. It has a "clear" line where I would expect it.
    So, my assumption right now is that I would pull an enable line high and feed an 8 bit pattern to the i/o board to drive a solenoid or lamp.

    #4 3 years ago

    And, I got my hands on a Whitestar schematic. The theory section mentions address decoding, which makes me think it might be an address bus vs discrete enable pins. I'm slow with translating schematics to logic functionality, so I'll post later. But I should be able to wire the 20 pins to an arduino and just brute force the mapping.

    #5 3 years ago

    Have you read this? Don't remember if it goes into that level of detail, but it's interesting nevertheless.

    http://idm-lab.org/bib/abstracts/papers/tr-pinball.pdf

    #6 3 years ago

    It mentions the registers in passing. I'll try to see if they released source code.

    #7 3 years ago

    Ok, I have it mostly figured out now. A few unclear points still, but someone with an Arduino should be able to drive these power I/O boards now.

    1) There are 4 address lines(A0-A3). A3 is used as a select for the two 74LS138s. IOSTB is the IO Strobe line from the CPU. It must normally be low, since it's tied to the 2nd active low enable line on both 138s. The 138s are 1 of 8 decoders, so they have 8 outputs. So:
    000 = Output 0 is active.
    001 = Output 1 is active
    ....
    111 = Output 7 is active

    2) There is a data bus that goes through an 8 bit transceiver, the output of which is sent to the normal drivers. However, the original data lines are sent to the Aux In ports. Not sure why they needed to be different.

    3) Which leads me to the meat of things. To activate the first drivers on the Solenoid Bank A, you should just need to write 0000(000 to the addresses, A3 being 0 activates U204, which means that 000 is SOLA active) to the address side, and 00000001 to the data bus. IOSTB has to be low to indicate a valid address.

    There is one major caveat. The light matrix return has to be activated at least once every 50ms. If you aren't scanning it, then you need to call 0001 xxxxxxx1. If you are running the lamp returns, then this should be taken care of.

    The BRESET line needs to be driven high. This is fed into the watchdog chip(U210) and will shut down the I/O board otherwise.

    I'll post the pinout soon.

    #8 3 years ago

    Changed the name, since it's more about my findings than someone else answering my questions.

    #9 3 years ago

    Pinout of the connector J1(MPU to I/O):
    -----------
    Data 3 -----| 1 | 2 |----- Data 4
    Data 2 -----| 3 | 4 |----- Data 5
    Data 1 -----| 5 | 6 |----- Data 6
    Data 0 -----| 7 | 8 |----- Data 7
    NC -----| 9 | 10 |----- NC
    NC -----| 11 | 12 |----- A0
    RESET-----| 13 | 14 |----- A1
    IOSTB -----| 15 | 16 |----- A2
    NC -----| 17 | 18 |----- A3
    GND -----| 19 | 20 |----- GND

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