I need help from someone who knows way more than I do about electonics!
I'm trying to troubleshoot an A6 sound/speech board from my Black Hole.
In a nutshell, the problem I'm experiencing is that when I power up the A6 Sound/Speech board it immediately makes the first tone of the A6 "test", and no further sound - despite the game working perfectly in silence. I figured out that if I press the sound board test button, it makes another tone, and if I press it again it says "Complete" and the sound works as normal. It's as if pin 17 of the 6532 RIOT is grounding somehow during boot up and thereby innitiating a "test" routine. After much experimentation and probing I have figured out all the following:
1) all input lines are working perfectly from the CPU board Z27 > Z31 > driver board Z13 > sound/speech board U16 & U17 > 6532 RIOT
2) after the boot failure if the machine is powered off, and then powered back on within a few seconds to a couple of minutes, it powers up normally - without going into the "test" routine. Once running, all sounds are present, and the machine works perfectly. As well, all tests from Tony Holdgate, Clay, & Kirb's trouble shooting guides check out 100% ok!
3) When the board fails to boot, the RESET lines of the 6502 (pin 40) and the 6532 (pin 34) both go Lo briefly then Hi and remain Hi as they should, but I noticed that the IRQ lines of both chips (6502-4 & 6532-25) are both Lo , and remain that way until the test routine is completed by pressing the button twice. This is different than when the test routine is innitiated once the board is running properly - in this case the IRQ line remains Hi.
4) If I boot the Pin with the RESET line (6532-34, or 6502-40) jumpered to ground and kept Lo for a few seconds and then remove it - RESET goes Hi - The Pin boots perfectly, and the sound works perfectly. NO TONE OR TEST ROUTINE IS INNITIATED! My conclusion from this experiment is that the board is capable of booting up properly with a much longer "Lo delay". Maybe the fault lies with the actual delay circuit.
What I need is help understanding exactly how the delay circuit works, and how the individual components create the Lo, delay, and then latch the Hi signal to keep the processors running properly. Innitially, I thought that it was the charging of C3 that created the delay, but increasing it's value to 470uF made no difference in the booting success. After some reading of the data sheets, I'm wondering if it's actually the "switching time" of the 2 schmitt triggers U1A & U1B that's responsible for the delay. And I'm not sure of the purpose of CR1. Any help would be greatly appreciated.
5) Caps C3, 38, 39, 40, & 41, have all been replaced, and all board voltages are spot on. The pull up resister (DIP array 4116R-002-222) on the 6532 RIOT test pin also seems to be within spec at 2.2 K OHM.
Sorry for the long winded description, but this one really has me stumped, and any help would be greatly appreciated. I've attached a picture of the reset circuit for reference. It's deceptively simple.