OP

Quoted from sneakerpin:

Getting home, I did a bit more digging, and dug as deep as I could into the schematic, and truth tables on the IC datasheets.
I deciphered the signals as follows, and I could be wrong in places, so if anyone wants to correct me, I'd learn more:
The 6502 issues the address and data signals of scoring, and lamps and solenoids, etc. for the entire system. Each RIOT chip is like a Peripheral Interface Adapter chip, or "PIA" as known in Williams System 11 games.
The specific 6532 (RIOT), in the scoring case, is U5 (6532-2) and depending on which clock cycles of the 6502, is engaged with refreshing ALL of the display information and this happens repeatedly as long as the game is on.
U5 has two bi-directional 8-bit peripheral busses to drive all five 6-segment displays and the one 4-segment display in Haunted House. Bus B Handles the bit pattern to determine segment pattern of each digit (0-9), while Bus A handles the strobe, or "frozen/latched" segment pattern of each digit (position 0-5).
For SEGMENTS:
Working a bit backwards, the 7448 IC's have a 4-bit input to drive all of the segments to create 0-9
Prior to the 7448, there is a 74175 D-Flip Flop, it's job is to "latch" the 4-bit BCD so that other clock cycles of the system don't clear the segment pattern going to the 7448. The output of the flip flop is inverted back to what it was supposed to be (Q!), because the input of the flip flop is also inverted.
The 7404 inverter preceding the flip flop is used as a buffer?
The 7404 receives it's 4-bit BCD from the RIOT, and coupled with the RIOT's A bus doing the digit strobing, we have our display logic in a nutshell (I hope I got this right)
So, I'm really down to the 7404 (Z16), pin 9 (input) and 8 (output). If the output remains HIGH, I will not see even digits displayed because the truth table of the 7448 tells me so. Since the 74175 acts only to preserve BCD data between refresh cycles, and all score displays act the same, the problem might just end up with a simple inverter chip. Oh man.
BTW, while the B bus of U5 appears strictly for driving segments... the A bus has other data lines that appear to control "Segment h" (The extra "1" on each 6 segment display) and also the notorious SLAM SWITCH, as well as some "enable input" lines going to the switch matrix.
@zacaj, you've done well. I haven't troubleshot this deep since the early '90s. Man, this was fun looking at datasheets and schematics!
I hope to find my set of "chip clips" buried in the garage, as I am really nervous about testing the board by leaning over the cabinet and having that damn back box door in the way... I suppose if I had a real pin repair work space, I'd have a spare PSU on the bench...
I'll try to do this tomorrow.
Thanks again, @zacaj. I hope this thread helps another baffled 7-segment display pinhead!
Tim