Swap U10 and U11

Occasionally a bad U8 RAM or a U11 PIA will make the POST fail.

Make sure the IRQ, reset, clock phase 2 all make it to the pia. Make sure U17 gate for chip select 2 is pulsing when the PIA is being tested. U18 is also involved in the CS2 circuit (U18 makes /A9 and /A12 which then NAND at U17).

have to assume a soldering mistake, broken via, bad IC socket at this point...

I guess you could whack IC14(zero cross) and anything else related to its CS circuitry.

Its hard to say what the software program wants to do once a failed test happens. Results likely to be different when a RAM test fails or PIA test fails. I imagine that software ends up in some infinite loop.

Trace every circuit out including like the output disables for the RAM. Say the OD is stuck on the U8 ram and it craps on the data bus when the PIA is being tested. Stuff like that. Trace the VUA-2 circuit too. Zero cross, display interrupt etc.

Solder splash? Get a bright light and look over the board really really well. A good visual inspection goes a long way.

Correct, once a failure is detected in the power on tests, the software sits in an endless loop on an instruction that branches to itself. So you won't get any more activity on the R/W line and the CS signals to the PIAs will probably cease.
All the PIA test at 4 and 5 does is check the internal registers of the PIA. It doesn't test the I/O pins because there's no external feedback mechanism.
So if you look at the schematics, the signals on the left side of the PIA chips are important for test 4 & 5, the right side signals not.

another thought...

shorted cap on a pia output. Use Leon's test ROM and see if any PIA leg is stuck always low. then check to see if the cap is shorted to ground. That would fail a PIA test.