Busy week this week. It's travel time again. So much pressure for cabin upgrades that I'm not high enough on the priority list to receive one. Too many leftover "Covid elites" (those who took advantage of airline loyalty program reduced requirements to maintain their status). Relegated to the center of the aircraft. I don't fly (or is that pay enough $ on air tickets) with the airline often enough that I'm important to them.

I (somewhat) routinely watch for component availability. The one component I have seen that appears unlikely to be restocked any time soon is the SN74LS245N. At least, if you want to purchase from one of the big box merchants in the US. It looks like Mouser might actually be getting some in stock, soon. They are quoting factory lead-time at 105(!!!!) weeks. That's TWO years.

The other one that was out-of-stock for a long time was the ULN2803A but that appears to be coming back in stock. Everything else fluctuates in and out and you just need to watch merchants. It used to be that you had to buy quickly when things came back in stock because if you didn't, someone else would clean them out. Those supply chain issues seem to mostly be a thing of the past.

Some things that can be difficult to get have available substitutes, such as 80SQ045NRLG. Another one is the LM2678T-ADJ/NOPB. This part can be substituted with the LM2678T-5.0/NOPB since the adjustable is just configured (on the board with resistors) to be 5V.

If you need help with components, just ask questions either posting them here or using messaging.

Not yet. I have spent the last three weeks helping out family with stuff and submitted a fabrication order for the board (with correction) last week. I am hoping the board will be delivered at the end of this week (if I'm lucky) or next week. It will definitely be delivered after I return. This board is a board I want to get working since it was blocked for a long time and the blocking issue was resolved. It may still be blocked on another issue that was masked by the initial blocking issue but without building the latest revision, I won't have an answer. Expect one within a week or two if I don't get distracted by something else.

Some more small progress. I got some more boards in from fabrication on Friday and got distracted by "Christmas Friday".

First up: development boards for testing and verifying software.

boards_287.jpg

1. The one at the top left is for an 8-pin PIC and was initially used to get the first revision of the self calibrating proximity sensor board working. That works. See a previous post in this thread.
2. The one at the top right is for a 14-pin PIC with 1x input GPIO and 11x bidirectional GPIOs.
3. The bottom one is for a 20-pin PIC with 1x input GPIO and 17x bidirectional GPIOs. I packed the 20-pin board so it uses some SMDs.

Next up: application of the previous.

boards_288.jpg

1. The left two boards are the original prototype boards that use the Dallas dual digital potentiometer DS-1803-010. As previously mentioned, this has two potentiometers with an I2C interface. One big problem with using this component is that it takes up a lot of board real estate because it is a 16-pin DIP.
2. The center boards are the next revision prototype boards that use a Microchip MCP4132-103 digital rheostat. It can also use a Microchip MCP4152-103 digital rheostat. The 4132 has a granularity of 128 settings giving ~80 Ohms per setting. The 4152 has a granularity of 256 settings giving ~40 Ohms per setting. 128 settings works perfectly fine. This rheostat also requires a SPI interface rather than an I2C interface, so now I have written code to "bit bang" both I2C and SPI. Both protocols have their pros and cons but in the end, I think I like I2C better than SPI due to addressability (chip select) and only requiring 2 pins for communication. I searched for an I2C rheostat/potentiometer but could not easily find one in THT. Most were SMT and tiny in their form factor. I got this board working yesterday after a few software revisions to figure out what I did wrong.
3. The right three boards are the final product (release) boards that fit the mounting holes of the OEM board. As the OEM board is smaller than the prototype and I am adding some components to the board, I resorted to using SMT to make everything fit. Bonus with this board is that it supports both the "lane" (narrow) configuration and the "hit" (wide / area) configuration. Selection is with a jumper.

I have a Theatre of Magic that I have been working on for months to a year now. I guess I need to finally finish the task so I can test these boards in the machine and make sure everything works properly. I fully expect everything to work because the prototype board works on the bench when switching between both "lane" and "hit" configuration.

Playing catchup while trying to time slice moving some boards forward. I have a small backlog of bare boards that I intend to get dispatched this coming week. I'm on a roll working through some of these new boards and am trying to keep the pace up to get any issued understood so I know the path forward if there are blocking issues.

boards_289.jpg

This board is now fully ready for testing. It is the "type 1" board that is compatible with WPC-89 games as well as SS. I had missed ordering one of the small SMT capacitors and just got them in yesterday to complete the other configuration that needs testing. Board passes on the bench and should pass in a machine. I still need to get to that machine but I find I am still too busy to get to it. I don't mind being busy but I don't like being too busy.

I also need to investigate a CV and MB to get the other WPC-95 configurations complete. The board changed and I need to see the CV sensor that is probably different from the RS, TOM or SS sensor. Another task on my list of things to do.

boards_290.jpg

I have also been trying to get some resolution on this board. I verified this revision is executing but I did not install any of the component to output to the display. I spent some time adding those components to get to that stage of testing. It's still not complete because I need to add some of the headers to be able to connect it to the display. The next steps are to get the display working. Once I get the display working I will move to getting the switch tests which don't require any TO-220s to be installed. If both of those pass then I will install the remaining TO-220s and complete the testing.

Got the display and power headers in today and put the board back on the bench. I also completed a universal numeric display. Good thing I actually made that board.

I hooked it all up and turned it on. Nothing on the display. WTF? Blanking LED on. I know the PA2 signal is strobing. Why no display? Grabbed a screwdriver to adjust the potentiometer and BOOM. Display. Sweating for nothing.

• System 6 = Gorgar.boards_291.jpg
• System 7 = Black Knight.boards_292.jpg

The strobing causes issues when capturing images but I can assure you that Gorgar shows "496" and Black Knight shows "500".

The tests do run but without the drive transistors nothing happens.

Next up is to install the remaining headers and drive transistors. Then re-test. I might have to figure out what to do for the bench testing of this because the location and keying of the connectors is different from System 9/11. I don't really want to build a rig just for this board. I might have to break out my old Siegecraft LED boards.

The test boards are compatible. The order is different. It's not a direct 1-1 incrementing or 1-8 decrementing for some of the different connections.

I did figure out a solution to this problem and got the board verified!

• System 6 = Gorgar.boards_293.jpg
• System 7 = Black Knight.boards_294.jpg

I ended up using my portable adapter boards. I had to find the ones with the appropriate key but didn't have one for the lamp rows. That's 9K7. So I re-used a connector and re-ordered the wires so I could use one of the available adapter boards I have to test the lamp matrix.

• Gorgar is pretty straight forward. Solenoid firing order is not "down the line" on the panel but it is correct when order corrected.
• Black Knight has the added complexity of solenoids 23, 24 and 25. I couldn't figure out where they go until I did some searching and it looks like 23 and 24 and not used and 25 is the flipper relay. 25 definitely enables/disables the flipper relay. The sound outputs also work. These are the pink LEDs on the panel. I connected them to solenoids 37-44 on the diagnostic panel.

I used the all-in-one EPROM adapter board so I could easily switch between System 6 and System 7. Actually, I broke a leg pin on my Black Knight EPROM so I pretty much had to use this board as I didn't want to bother repairing the EPROM. I'll do that later.

So, everything appears to work on the bench. My next problem is that I don't actually have a System 3-6 or System 7 game to test this board in. I know that the Rottendog MPU327 used to support System 7 but no longer officially supports System 7. I couldn't easily locate what the actual compatibility problem is so that's still an open issue for me. I have a small number of (bare) boards available and I will probably build another one or two to have available for testing. Local to the PNW and interested in helping out?

Observant readers might notice something different in the top left of the board. I have been struggling with this little thing for about 5 months now but it appears to work properly in this board. I hope to have some more information on this in the near future but it's been 5 months and it needs some more testing.

I have stared at the RD schematic and am unable to see what you're referring to.

• The ROM ~CE signal is !(VMA && E && A14). This means valid address on the timing pulse at address $4000+ (or $C000).
• All the PIA CE signals are CS0=(VMA && A13), CS1=<other address bit> and ~CS2=A14. Final result for CS0+~CS2 is (VMA && A13 && !A14). This means valid address at $2000-$3FFF. The schematic does show CS0=(VMA && A14) for IC18 but the signal label is VMA-A13. Seems like an error in the schematic but since I don't have an actual board in front of me, I cannot verify the actual connectivity.
• The RAM ~CE signal !(VMA && E && !(A13 || A14)). This means valid address on the timing pulse at $0000-$1FFF. The mapping of A12 seems to have an error on the schematic using A13' as an input instead of A8. Though I will admit I didn't spend much time trying to decipher the double mapping of the SRAM for A12.

Can it really be something as fundamental as not double mapping SRAM? If this were the case then it would have NEVER worked in S7 rather than working and then official compatibility being pulled.

I have DE CPU boards available. That board doesn't generate a lot of interest so I have plenty of them. None complete as I build on demand. All bare.

I also have some other DE boards in the works but I haven't had any time to go back and look at them. Given that the DE CPU board doesn't generate much interest, the other DE boards are low priority. Recently, I have been spending the available time I have working on the S3-7 unified CPU/driver board because there's more interest in that board.

I think I have a different schematic that shows A13' instead of A8. I couldn't locate the A13' signal/label elsewhere in the schematic.

RD_MPU327_schematic.jpg

The CS (chip enable / chip select) signal is correct. It is VMA=1 && E=1 && A13=0 && A14=0. This equates to any address < $2000. Since the RAM is mapped at $0000 and $1000, this is valid.

The logic for the address routing (using A8) is correct. The A12 address bit select to the RAM IC is also correct.

• A8=0 selects A12=0. This means that $0000/$0200/$1000/$1200 maps to $0000 in the RAM. This is the SRAM compatibility with S3-6.
• A9=1 selects A12=0. This means that $0200/$1200 maps to $0000 in the RAM. This is the XRAM for S7.
• A12=1 selects A12=0. This means that any address >= $1000 maps to $0000 in the SRAM. This is the XRAM for S7.
• A8=1 && A9=0 && A12=0 selects A12=1. This means that $0100 maps to $1100 in the RAM. This is the CMOS.

The logic is constructed this way so that only a single logic type (NOR) is required to implement the RAM mappings and routing. IC4B, IC4C and IC4D can be implemented using a single AND gate but that's another IC. If there is a spare AND gate unit it could have been used. It looks like there are 3x AND IC (IC7, IC8 and IC12) but all the units are in use.

It's an error in the schematic. The signal is VMA-A13. The signal A14 from the bus is incorrectly labeled. It has to be A13 to be correct. The same VMA-A13 signal is used as CS0 for all the other PIAs.

I don't know what software was used for their boards either but these published PDFs are edited or modified from the true schematic. I have seen errors in other RD schematics which is why I think they are edited. The VMA-A13 with the A14 signal is a good indicator that someone edited the schematic rather than used the master schematic from the software.

I had this board made as an experiment at the possibility of replacing a PIA with other logic ICs. The PIAs are still being manufactured by Western Design Center. This is more a challenge and to better understand how the system is put together.

boards_295.jpg

It's a simple board that installs where the PIA would install. It only implements PortA and PortB. It does not implement CA1/CA2/CB1/CB2. It also only implements OUTPUTs from PortA and PortB. As stated, an experiment.

boards_296.jpg

But it does work. I replaced U41 which is all the segments for the top alphanumeric display. The strobing is causing the image to be incomplete but the display test works and passes correctly.

I have a more complicated test board that I am working on to try to implement CA2/CB2. These signals are (mainly) used for the software control of the special solenoids. They are used to test the circuit in System 3-7, are NOT used in System 9 and again used in System 11 to test the circuit when the game uses the special solenoid triggers or used to energize the solenoid when the special solenoid triggers are not used. I still haven't looked at CA1/CB1 and how I would go about implementing those signals.

The test board is a good precursor to a small board I want to make to test PIAs. The tester will exercise PortA, PortB, CA1, CB1, CA2 and CB2 when used as either input or output (except CA1/CB1 which are input only). That's (yet another) board in the works. I always wanted a PIA tester because I don't have the Neoloch.

If this is/was done deliberately then it's a disservice. Without a correct schematic, you cannot effect correct repairs. Anyone looking at the traces and verifying continuity can easily spot these "errors". I understand there is a fair amount of "idea theft" nowadays and I'm not a fan of it.

If I do see something that I can make cheaper, I'll make it for myself but won't advertise it. I deliberately avoided making a Twilight Zone clock board to not step on Ingo Kramer's toes but he hasn't been delivering them for quite some time and I know his board is better than the other boards on the market that people seem to continue to purchase without doing much research.

Another example is/was the Pinbits "auto eddy" board. Since Pinbits no longer exists and some of the only sources for similar products are not domestic US (and therefore typically command higher shipping costs), I decided to go ahead and make a board and make it available to the domestic US market (cheaper shipping).

I don't know much about the S3-7 ROMs and their versions. I just don't have the experience with those games having never worked on them. This is why I am apprehensive about the S3-7 board. I have only disassembled and looked at the initialization code and it's pretty simple. It just configures the PIA ports the way you would expect them to be configured. There's no actual feedback from the PIA ports once the configuration is set. The software can't read back the information it set as data in the output. It can only read data from a port configured as an input. I can only think that the software either gets random or floating information when it attempts to read input data from a PIA that is non-existent. This causes the software to do things that it was not written to handle and so either crashes or loops infinitely or whatever it will do in the failure case. The software is only as "smart" as it has been programmed to be.

For S3-7 games:

Most games have two slings and three pop bumpers. Some games have four pop bumpers. That consumes all six special solenoid drives (SSDs). Some game don't use all of them and those games leave the SSDs unused. However, not all games leave those SSDs unused. I can see at least two games that don't. The Pharaoh wiring diagram shows it uses SSD21 and SSD22 under software control. The Solar Fire wiring diagram shows it uses SSD19, SSD20 and SSD21 under software control. To support these games, you will need PortC output (CA2/CB2) support. To support the coin door diagnostic buttons, you will need PortC input (CA1/CB1) support.

For S11 games:

Not all of these use the special solenoid triggers (SSTs). As above, those that have two slings and three pop bumpers leave only one SSD. F-14 uses SSD21 and SSD22 for the diverters because it only has one pop bumper. Early S3-6 games didn't use many solenoids. S11 games use many more solenoids and Williams started using the SSDs more extensively to get maximum features out of the available 22 solenoid drives.

I am sure you know the above information. The purpose of the above is to better educate any reader who wants to know more.

I am by no means an expert in S7 (or any system for that matter). As I've mentioned, I don't have much experience with these machines. The only thing I can see is that Williams freed up the sound selection from solenoid drives to the PIA. Since they only needed 5 signals to maintain compatibility that left some additional signals of the 16 available unused. It looks like one additional bit was added for sound select (doubling the number of available selections) and the comma was added for the 7 digit displays. The remaining signals are unused/unassigned. I assume these were routed to the ribbon cable connector for future expansion that never happened. Why did they ground one of the signals? No clue. The jumper allows the grounding to be selective. Presumably, the could pull the signal up or down on the expansion board if needed.

Interestingly, the use of the sound PIA in S7 morphed to use all signals in PortA for the sound selection in S8. The comma remained at PB6/PB7 and the remaining PortB signals just floated. Since S8 only had a small number of solenoids, the solenoid drive for 1-8 morphed into a latch. In S9, solenoid drives 9-16 were moved back to the PIA using PortB (the comma signals were moved to PortC of the display PIA) where they remained for the duration of S11.

EDIT: Added after I just did some inspection of the code.

The sound PIA @ $2100 is a special case. The other PIAs are initialized as you would expect. Both ports of all the other PIAs are outputs, except for PortA of the switch PIA. This is the switch rows that are set as inputs. The sound PIA sets PA0-PA6 as output, PA7 as input, PB0-PB5 as input and PB6-PB7 as output. This would provide some additional reason for the W25 jumper. To pull the input signal low by default if installed or pulled high if not. Note that in S11 for the display PIA, PA4-PA6 are outputs (BCD for the diagnostic digit) and PA7 is used as language select input. Could it be that Williams initially wanted a single input bit (configuration selection) in S7 but never used it until S11 when it was used for language select? Expiring minds want to know but will probably never know for sure.

The S3-7 board is currently blocked for general distribution due to lack of machine testing (I don't have S3-7 games). Your help will advance the board to give me some confidence. I have a local friend (20 miles) with some S7 games but they aren't set up. The Northwest Pinball Collective does have one game that could be used but I would have to ask the owner of that machine.

I am currently building (another) one for testing purposes. Contact me on messaging (take this offline) and we can go from there.

Note that even if the board is available for general consumption, my complete board queue is WAY out there. For those in the build queue and are wondering why I am not building your board (instead working on this stuff), I have reserved April and May for "me time". I have been building boards for months on end and things have just been neglected (I have machines in my garage that haven't had any work for many months, some for years).

I want to get the S3-7 board going which is why I am spending time on it. It's been blocked for over a year because I haven't spent any time on it. The other reason the time is reserved is that the local Northwest Pinball and Arcade Show is in June and I have to prepare my own machines for the show as well as help out with local repair parties (gatherings where local collectors get help fixing their machines in the hopes that they will be volunteered to the show).

After the show, boards in the build queue will be built. Mostly in order. Order will be (slightly) shuffled to enable batch building (WPCs with WPCs and S11s with S11s) as that is more efficient and will increase throughput.