(Topic ID: 321881)

DMD controller board shows text but not animations

By Zigzagzag

1 year ago



Topic Stats

  • 3 posts
  • 2 Pinsiders participating
  • Latest reply 1 year ago by Zigzagzag
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#1 1 year ago

Hi,

I have an original WPC DMD board that has worked (apparently) fine for a couple of years in a #HS2 with a Pin2Dmd.
While testing a new colouring, it appeared the board was glitchy causing missed animations/colouring, so I swapped it with one from another game.

Now - the glitchy board (which worked fine in #HS2) has issues in #Fish tales (no animations shown, only text) and Shadow (only shows usual garbage at boot, then goes blank).

I have tried replacing some ICs (U2, U31, U32, U33, U35, RAM) with no difference.

Does anyone have a clue what part of the DMD board could cause these issues ?

----

I have also measured each IC with red lead to ground and black to each leg and not found anything that appears to be shorted or non-connected.

#3 1 year ago

ChrisHibler Fortunately it was only the 2N3904 transistor that was bad.
I now have animations on the Pin2Dmd screen again.
I'm not 100% on the theory, but this page gave me a clue : https://bcd.github.io/freewpc/The-WPC-Hardware.html

I quote :

A.2.11.3 FIRQ
FIRQ can be generated in two ways: from the dot matrix controller after a certain scanline is redrawn, or from the high-performance timer. When an FIRQ is received, the CPU has to determine which of these occurred to determine how to process it.

The DMD controller can interrupt via FIRQ when a particular scanline of the display has just been sent to the display. This can be used to tell the CPU when to display a new frame.

The high precision timer can interrupt when its value reaches zero.

Either of these can be enabled/disabled individually, in addition to masking the interrupt at the processor.

----------------

And :

The CPU can also write to WPC_DMD_SCANLINE to request an FIRQ interrupt to be generated when the current scanline reaches a certain value. This is used to implement shading: the active page buffer is rapidly changed between different bit planes at different frequencies to simulate color. Because there is latency between the time that FIRQ is generated and the CPU can respond to it, this writable register can compensate for that delay and help to ensure that flipping occurs as fast as possible.

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