(Topic ID: 301245)

Data East Version 3 - No Blanking

By Rikoshay

2 years ago



Topic Stats

  • 6 posts
  • 2 Pinsiders participating
  • Latest reply 2 years ago by Rikoshay
  • Topic is favorited by 1 Pinsider

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    #1 2 years ago

    I have a DE V3 board that has had considerable acid damage, this has been repaired........More of a thread to come later that will hopefully help someone?

    But am stuck on the DE pinwiki page 29.

    Just need some clarification please?

    Under the heading 'the blanking circuit explained' 2. states that pin 4 of the 6821 should be high, yet underneath regarding the 555 timer 2. it states that pin 4 should be pulsing.

    The blanking circuit explained
    1.A properly executing CPU will send data to the display 6821 PIA at 11B at regular intervals (every 2.8 msec).
    2.This action causes PA2 at pin 4 of the 6821 to go high. The schematics call this signal "TG".

    When operating properly, the pins of the 555 timer will behave as follows (pin number, logic signal)
    Pin 2. pulsing at the same rate as the 6821 PIA at 11B, pin 4

    So for testing purposes this to me reads as conflicting, but on the other hand i may be missing something hence the post.

    1 week later
    #2 2 years ago

    turns out Pinwiki is wrong in a small detail, i contacted them but haven't had a reply.

    regardless pin4 of the 6821 at 11B should be pulsing, not logic level High.

    what's odd atm is with the 6821 at 5F removed the cpu blanking is stable, with it installed the LED goes out after about 7seconds, so assuming something after the PIA is causing the blanking circuit to kick in.

    #4 2 years ago

    Thanks for the reply.

    I am currently waiting for a test chip to arrive, but it seems to have gone astray in the mail.

    I don't understand as it states below that pin 4 will go high but then it states pin 4 will be pulsing, both with a properly executing cpu and 555

    1. A properly executing CPU will send data to the display 6821 PIA at 11B at regular intervals (every 2.8 msec).
    2. This action causes PA2 at pin 4 of the to go high. The schematics call this signal "TG".

    2. pulsing at the same rate as the 6821 PIA at 11B, pin 4

    If the cpu is running properly and the program executing then pin 4 on PIA should be pulsing along with pin 2 on 555, pin 4 should only go high if the blanking detects a problem and as a result the blanking LED goes off.

    What am i missing/not understanding?

    #5 2 years ago

    i did start this thread in Tech generic and Tech DMD so i don't know how it ended up in Tech early solid state, sorry fellas.

    #6 2 years ago

    I've got it to the blanking stays on for about 8 seconds then goes out.

    Might someone know what is happening in the boot sequence at this point to cause the blanking circuit to take affect?

    and i know this is a DE version 3 cpu, for a DMD game but somehow the thread ended up here, can a moderator possibly move it please?

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