Pics are fuzzy. Are you sure it's not your keyed pin?

Its not the keyed pin. It looks like its the chip select and R/W control on PIA 9B which interfaces with the segment displays. Are your displays working correctly? No lines out or decimal points out?

if its pin 19, its the enable pulse. Its the timing signal from the PIA.

Ok, I'll try to explain. This is just from me looking over the datasheet and your schematics. I'm sure there is a PIA expert out there somewhere. That pin (19) goes to pin 25 on the PIA. This is the E pulse or enable for the chip select. The PIA is on a bus (along with other chips) and its chip select lines are tied...somewhere to the processor.

When the processor idles, those chip select lines will be in some state (doesn't matter what state). There will most likely be noise or something that we don't care about going through those lines. This is where the enable comes into play. When the processor is idle, enable is low or disabled. So the chip selects are in a state but you cannot write to them aka they can't listen. Its sort of a feature that makes it so certain events (like display line or anything else the pia controls) doesn't fire from noise.

I don't feel its a problem but if you closely watch your display (again or whatever the PIA is connected to...i think in your case its the segment displays) they might intermittently mess up.

The schematic indicates that CN21 pin #19 connects to pin 21 of one of the PIAs, the enable pin.

The schematic I have says that PIA is used for the alphanumeric display. Perhaps it translates to the DMD on your GNR, I don't have a GNR schematic at hand.

19 goes to 25 not 21 gnr.JPG