A wiseman by the name of Shock me gave me this priceless information, it may help you also good luck

Quick Google search:

After power-up and the correct reset timing/voltage regulation, the LED briefly
flickers (for approx 300 milliseconds) before;

*1st flash*
The test program attempts to validate the condition of the 128 bytes of NMOS
RAM located at page zero - address $0000 through $007F. Note that I haven't
said "the test program attempts to test the RAM at U6" - why? Because Bally
made an oversite with the test documentation.

If you have a 6802 installed in your S+T then the *internal* 128 bytes of
RAM are tested and *not* U6 providing the 680x's RAM Enable line (pin 36) is
strapped high (to the reset line) via jumper "k". The software doesn't care where
the RAM is physically, as long as there is RAM at page ero (it's transparent
to the software). The test program attempts to write a bit pattern to address
$0000, starting with $00 and counting upto $FF. If the test program
sucessfully manages to write and then read back (validate) the count, it then
moves onto the next byte $0001, until all 128 bytes have been checked.
256x128 = 32,768 write cycles with validation. If this is sucessfull, the LED
flashes for the *first* time (the initial flicker is not counted as a flash).

If your using a 6802 and the RAM test fails (you don't get the first flash) - you
might be lucky. Move jumper "k" (the internal RAM enable jumper) to position
"L" and install a 6810 RAM IC in U6 then run the test again, else, you'll need
to change the 680x (the internal architecture is damaged).

An interesting point here. Joel and Vickie (the Pinball Liz) listed a problem in
their tech tips #34 with the self test button on S+T not being debounced
which sometimes causes the board to crash after attempting a test.
Because the switch is not debounced, the switch contacts make and break a
number of times translating to a *number* of valid NMI requests to the 680x.
The *stack* and *workspace* RAM in S+T is only 128 bytes wide (page zero
$0000-$007F, the exact stack length is unknown to me). The 680x has to save
the contents of it's internal registers onto the stack when it encounters an
NMI (or IRQ) interrupt. A number of interrupts recieved in this manner will
cause "nesting" (interrupts are "queued" to be processed in last in first out
[LIFO] order) and the most probable cause of the board crashing is the stack
overflows, wraps around, and starts to overwrite itself wiping out the data
previously saved onto the stack. The conclusion? The uP crashes because it
pulls data off the stack that didn't match the data it originally saved.
Power-cycling is the only option to clear the problem (there is no reset button
on S+T). The problem is further agrovated by the fact that speech data
transfer requires an IRQ interrupt - further stack usage translating into IRQ
and NMI data colliding caused by the over-write when the 680x "pops" (pulls
data off) the stack.

*2nd flash*

The 680x attempts a bit-pattern write to the internal registers in the PIA at U7
(the speech control PIA) in the same manner as the RAM test. If the LED
flashes for the second time, then the test was sucessfull. If the test failed -
check the sockets/swap out the PIA.

*3rd flash*

Exactly the same test as U7 is carried out on the PIA at U11 (PSG control
PIA). A successfull test causes the LED to flash for the third time. If the test
fails, then perform diagnostics as for U7.

*4th flash*

The 680x attempts to write too the internal registers of the AY3-8912 PSG and
then read the data back using the PIA at U11 as a parallel interface. A pass
is indicated by the fourth flash of the LED. If the test fails - swap out the PIA
at U11 for another (the U11 PIA self test cannot test the input/output state of
the actual pins as there is no data "loop back" - it can only write to internal
I/O registers of the PIA, and whilst the PIA may test okay, the output
buffers may be faulty). If the fault continues swap-out the PSG and check the
sockets of both the PIA and the PSG.

*5th flash*

The 680x now attempts a 9 byte transfer of data to the TMS5200 speech IC. As
the 5200 stack is empty on power-up, it will flag an interrupt stating
"buffer/stack low" for every byte transfered until it has 9 bytes (it only flags an
interrupt if the stack becomes half empty - 8 bytes or less). The 680x writes a
single byte at a time and waits for the buffer low interrupt until it has fed all 9
bytes. On receipt of the 9th byte the 5200 asserts "Buffer low" *no more* and
does not assert any further interrupt. If this occurs, S+T assumes to IC is good

Are you sure the Power supply board is working correctly?
Are you sure the MPU isn't the issue? do you have corrosion on it?
Have you replaced the two big capacitors on the Sol Driver board?

The Squawk and Talk sound board needs -12 volts for the amplifier. To get this voltage, it takes the backbox AC GI power, and converts it to -5 volts (using a 7905 regulator), and doubles it up.Note the sound board will still boot and flash its LED the right number of times, and will create the sound. Just with no amplifier power, you won’t hear the sound.

Also,Are the GI connectors in good shape?If GI power is missing there will be no sound.

Here's more info from Clay's PinballNinja Site and could very well be your problem.

Next is to see if the MPU board’s diagnostic LED is flashing. It wasn’t, locked on solid green. So first I always check pin40 of the 6800 CPU chip. It should be “high” (5 volts), meaning the reset section (in the battery corrosion zone) is good. Sure enough, U9 pin40 was high. So the reset was good – remember the reset pulls U9 pin40 low for half a second, waiting for the +5 volts to stabilize at power on, then U9 pin40 goes high. (This is SOP for any of these CPU based boards.) Once U9 pin40 is high, the CPU chip can start reading the ROMs and executing game code.

So how did I fix this? Well after doing this for a while, when there’s absolutely no battery corrosion and everything looks clean, and the reset circuit is working (U9 pin40 is high), I always suspect the U9 6800 chip itself. So I flipped a new 6800 into its socket, and sure enough, the MPU board came to life!

No problem with starting a new thread, but let's be more descriptive as to what's been checked as some of the above posts reference what's already been done, with the exception of swapping the CPU chip.

For those who want to try and attempt to fix this:

All test voltages on S&T were checked good
MPU and Power board are known good as they were swapped with same behavior
No flash on S&T, not even the first flicker
Tieing TP12 the reset circuit to GND does not activate the reset of the S&T MPU
C23 is supposed to have minimal AC voltage across the terminals, but his meter only has a 200V setting, and from other threads on RGP, it reads the same as theirs, so without getting a better meter, not able to rule that out.

As for overall game behavior the MPU passes the 7th flash, but then game doesn't go into attract mode

Good Luck, but without the proper tools (good meter, logic probe, replacement IC chips), I maintain that sending the board to Steve for $25 is your best bet.

If you like a good challenge, tho, your best bet is to get ahold of Clay's guides, a good meter, a logic probe, and some of the common ICs and components and carefully go through step by step all the tests. You'll need a good soldering station too if you start replacing IC's.

Good to know, my Flash Gordon sound isn't working either, I will be attempting to trouble shoot sometime this weekend.